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Aranda Barjola, Luis Alberto luis.aranda@urjc.es

Ciencias de la Computación, Arquitectura de Computadores, Lenguajes y Sistemas Informáticos y Estadística e Investigación Operativa / Universidad Rey Juan Carlos

Actividades

LLNN: A Scalable LUT-Based Logic Neural Network Architecture for FPGAs

  • Ramirez, Ivan
  • Garcia-Espinosa, Francisco J
  • Concha, David
  • Aranda, Luis Alberto
  • Schiavi, Emanuele

Ieee Transactions On Circuits And Systems I-Regular Papers (p. 347-359) - 1/1/2026

10.1109/tcsi.2025.3606054 Ver en origen

  • ISSN 15498328

Logic Neural Networks for Efficient FPGA Implementation

  • Ramirez, Ivan
  • Garcia-Espinosa, Francisco J
  • Concha, David
  • Aranda, Luis Alberto

Ieee Transactions On Circuits And Systems I-Regular Papers (p. 3390-3398) - 1/7/2025

10.1109/tcsi.2024.3488119 Ver en origen

  • ISSN 15498328
Open Access

Fault Injection Emulation for Systems in FPGAs: Tools, Techniques and Methodology, a Tutorial

  • Ruano, Oscar
  • Garcia Herrero, Francisco
  • Aranda, Luis Alberto
  • Sanchez Macian Perez, Alfonso Alejandro
  • Rodriguez, Laura
  • Maestro, Juan Antonio

Sensors (p. 1-23) - 1/2/2021

10.3390/s21041392 Ver en origen

  • EISSN 1424-8220
  • ISSN 14248220

Reliability Analysis of ASIC Designs With Xilinx SRAM-Based FPGAs

  • Aranda, LA
  • Ruano, O
  • Garcia-Herrero, F
  • Maestro, JA

Ieee Access (p. 140676-140685) - 1/1/2021

10.1109/access.2021.3119633 Ver en origen

  • ISSN 21693536

Efficient Majority-Logic Reed-Solomon Decoders for Single Symbol Correction

  • Garcia Herrero, Francisco
  • Sanchez Macian Perez, Alfonso Alejandro
  • San Isidro, Mateo
  • Aranda, Luis Alberto
  • Maestro, Juan Antonio

Ieee Transactions On Device And Materials Reliability (p. 390-394) - 1/6/2020

10.1109/tdmr.2020.2980754 Ver en origen

  • EISSN 1558-2574
  • ISSN 1530-4388
Open Access

An Algorithmic-Based Fault Detection Technique for the 1-D Discrete Cosine Transform

  • Aranda, Luis Alberto
  • Sanchez Macian Perez, Alfonso Alejandro
  • Maestro, Juan Antonio

Ieee Transactions On Very Large Scale Integration (Vlsi) Systems (p. 1336-1340) - 1/5/2020

10.1109/tvlsi.2020.2969094 Ver en origen

  • EISSN 1557-9999
  • ISSN 10638210
Open Access

A Methodology to Analyze the Fault Tolerance of Demosaicking Methods against Memory Single Event Functional Interrupts (SEFIs)

  • Aranda, Luis Alberto
  • Sanchez Macian Perez, Alfonso Alejandro
  • Maestro, Juan Antonio

Electronics (p. 1-12) - 1/10/2020

10.3390/electronics9101619 Ver en origen

  • EISSN 2079-9292
  • ISSN 08834989

Reliability Analysis of the SHyLoC CCSDS123 IP Core for Lossless Hyperspectral Image Compression Using COTS FPGAs

  • Aranda, LA
  • Sánchez, A
  • Garcia-Herrero, F
  • Barrios, Y
  • Sarmiento, R
  • Maestro, JA

Electronics - 1/10/2020

10.3390/electronics9101681 Ver en origen

  • ISSN 08834989
Open Access

Radiation Hardened Digital Direct Synthesizer With CORDIC for Spaceborne Applications

  • Aranda, Luis Alberto
  • Garcia Herrero, Francisco
  • Esteban, Luis
  • Sanchez Macian Perez, Alfonso Alejandro
  • Maestro, Juan Antonio

Ieee Access (p. 83167-83176) - 1/1/2020

10.1109/access.2020.2991882 Ver en origen

  • EISSN 2169-3536
  • ISSN 21693536

Analysis of the Critical Bits of a RISC-V Processor Implemented in an SRAM-Based FPGA for Space Applications

  • Aranda, Luis Alberto
  • Wessman, Nils Johan
  • Santos, Lucana
  • Sanchez Macian Perez, Alfonso Alejandro
  • Andersson, Jan
  • Weigand, Roland
  • Maestro, Juan Antonio
... Ver más Contraer

Electronics - 1/1/2020

10.3390/electronics9010175 Ver en origen

  • EISSN 2079-9292
  • ISSN 08834989

Este/a investigador/a no tiene libros.

Este/a investigador/a no tiene capítulos de libro.

A Real-time Demonstrator for Image Classification using FPGA-based Logic Neural Networks

  • Concha, David
  • Garcia-Espinosa, Francisco J
  • Ramirez, Ivan
  • Alberto Aranda, Luis

Proceedings Of Spie - The International Society For Optical Engineering (p. 1300005-4) - 1/1/2024

10.1117/12.3017459 Ver en origen

  • ISSN 0277786X