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Aranda Barjola, Luis Alberto luis.aranda@urjc.es

Ciencias de la Computación, Arquitectura de Computadores, Lenguajes y Sistemas Informáticos y Estadística e Investigación Operativa / Universidad Rey Juan Carlos

Publications

ACME-2: Improving the Extraction of Essential Bits in Xilinx SRAM-Based FPGAs

  • Alberto Aranda, Luis
  • Ruano, Oscar
  • Garcia-Herrero, Francisco
  • Antonio Maestro, Juan;

Ieee Transactions On Circuits And Systems Ii-Express Briefs (p. 1577-1581) - 1/1/2022

10.1109/tcsii.2021.3105558 View at source

  • ISSN 15497747

Fault Injection Emulation for Systems in FPGAs: Tools, Techniques and Methodology, a Tutorial

  • Ruano, Oscar
  • Garcia Herrero, Francisco
  • Aranda, Luis Alberto
  • Sanchez Macian Perez, Alfonso Alejandro
  • Rodriguez, Laura
  • Maestro, Juan Antonio

Sensors (p. 1-23) - 1/2/2021

10.3390/s21041392 View at source

  • EISSN 1424-8220
  • ISSN 14248220

Reliability Analysis of ASIC Designs With Xilinx SRAM-Based FPGAs

  • Aranda, Luis Alberto
  • Ruano, Oscar
  • Garcia-Herrero, Francisco
  • Maestro, Juan Antonio;

Ieee Access (p. 140676-140685) - 1/1/2021

10.1109/access.2021.3119633 View at source

  • ISSN 21693536

Efficient Majority-Logic Reed-Solomon Decoders for Single Symbol Correction

  • Garcia Herrero, Francisco
  • Sanchez Macian Perez, Alfonso Alejandro
  • San Isidro, Mateo
  • Aranda, Luis Alberto
  • Maestro, Juan Antonio

Ieee Transactions On Device And Materials Reliability (p. 390-394) - 1/6/2020

10.1109/tdmr.2020.2980754 View at source

  • EISSN 1558-2574
  • ISSN 1530-4388

An Algorithmic-Based Fault Detection Technique for the 1-D Discrete Cosine Transform

  • Aranda, Luis Alberto
  • Sanchez Macian Perez, Alfonso Alejandro
  • Maestro, Juan Antonio

Ieee Transactions On Very Large Scale Integration (Vlsi) Systems (p. 1336-1340) - 1/5/2020

10.1109/tvlsi.2020.2969094 View at source

  • EISSN 1557-9999
  • ISSN 10638210

A Methodology to Analyze the Fault Tolerance of Demosaicking Methods against Memory Single Event Functional Interrupts (SEFIs)

  • Aranda, Luis Alberto
  • Sanchez Macian Perez, Alfonso Alejandro
  • Maestro, Juan Antonio

Electronics (p. 1-12) - 1/10/2020

10.3390/electronics9101619 View at source

  • EISSN 2079-9292
  • ISSN 08834989

Reliability Analysis of the SHyLoC CCSDS123 IP Core for Lossless Hyperspectral Image Compression Using COTS FPGAs

  • Aranda, Luis Alberto
  • Sanchez, Antonio
  • Garcia-Herrero, Francisco
  • Barrios, Yubal
  • Sarmiento, Roberto
  • Maestro, Juan Antonio;

Electronics - 1/10/2020

10.3390/electronics9101681 View at source

  • ISSN 08834989

Toward a Fault-Tolerant Star Tracker for Small Satellite Applications

  • Aranda, Luis Alberto
  • Reviriego, Pedro
  • Maestro, Juan Antonio;

Ieee Transactions On Aerospace And Electronic Systems (p. 3421-3431) - 1/10/2020

10.1109/taes.2020.2971289 View at source

  • ISSN 00189251

Radiation Hardened Digital Direct Synthesizer With CORDIC for Spaceborne Applications

  • Aranda, Luis Alberto
  • Garcia Herrero, Francisco
  • Esteban, Luis
  • Sanchez Macian Perez, Alfonso Alejandro
  • Maestro, Juan Antonio

Ieee Access (p. 83167-83176) - 1/1/2020

10.1109/access.2020.2991882 View at source

  • EISSN 2169-3536
  • ISSN 21693536

Analysis of the Critical Bits of a RISC-V Processor Implemented in an SRAM-Based FPGA for Space Applications

  • Aranda, Luis Alberto
  • Wessman, Nils Johan
  • Santos, Lucana
  • Sanchez Macian Perez, Alfonso Alejandro
  • Andersson, Jan
  • Weigand, Roland
  • Maestro, Juan Antonio
... View more Collapse

Electronics - 1/1/2020

10.3390/electronics9010175 View at source

  • EISSN 2079-9292
  • ISSN 08834989

This researcher has no books.

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This researcher has no technical reports.

This researcher has no research projects.

This researcher has no supervised thesis.

This researcher has no patents or software licenses.

Last data update: 8/28/24 1:57 PM