A sequential algorithm of inverse heat conduction problems using singular value decomposition

International Journal Of Thermal Sciences (p. 235-244) - 1/3/2005

10.1016/j.ijthermalsci.2004.06.009 Ver en origen

• ISSN 12900729

• iMarina

Two-dimensional non-linear inverse heat conduction problem based on the singular value decomposition

International Journal Of Thermal Sciences (p. 1081-1093) - 1/6/2009

10.1016/j.ijthermalsci.2008.09.002 Ver en origen

• ISSN 12900729

• iMarina

Filter digital form of two future temperature methods for the inverse heat conduction: A spectral comparison

International Journal For Numerical Methods In Biomedical Engineering (p. 554-573) - 1/5/2010

10.1002/cnm.1142 Ver en origen

• ISSN 20407939

• iMarina

Evolutionary Computing and Particle Filtering: A Hardware-Based Motion Estimation System

Ieee Transactions On Computers (p. 3140-3152) - 1/11/2015

10.1109/tc.2015.2401015 Ver en origen

• ISSN 00189340

• iMarina

A Runtime-Scalable and Hardware-Accelerated Approach to On-Board Linear Unmixing of Hyperspectral Images

Remote Sensing - 1/11/2018

10.3390/rs10111790 Ver en origen

• ISSN 20724292

• iMarina

FPGA-Based High-Performance Embedded Systems for Adaptive Edge Computing in Cyber-Physical Systems: The ARTICo(3) Framework

Sensors - 8/6/2018

10.3390/s18061877 Ver en origen

• ISSN 14248220

• iMarina

Scalable Hardware-Based On-Board Processing for Run-Time Adaptive Lossless Hyperspectral Compression

Ieee Access (p. 10644-10652) - 1/1/2019

10.1109/access.2019.2892308 Ver en origen

• ISSN 21693536

• iMarina

DAMHSE: Programming heterogeneous MPSoCs with hardware acceleration using dataflow-based design space exploration and automated rapid prototyping

Microprocessors And Microsystems - 1/11/2019

10.1016/j.micpro.2019.102882 Ver en origen

• ISSN 01419331

• iMarina

Run-Time Reconfigurable MPSoC-Based On-Board Processor for Vision-Based Space Navigation

Ieee Access (p. 59891-59905) - 1/1/2020

10.1109/access.2020.2983308 Ver en origen

• ISSN 21693536

• iMarina

Exploiting Multi-Level Parallelism for Run-Time Adaptive Inverse Kinematics on Heterogeneous MPSoCs

Ieee Access (p. 118707-118724) - 1/1/2020

10.1109/access.2020.3005202 Ver en origen

• ISSN 21693536

• iMarina

Hardware-Based Particle Filter with Evolutionary Resampling Stage

7/10/2014

• iMarina

Development of Hardware Accelerators Using OpenCL Methodologies for Single and Multiple FPGA Architectures

Industriales Research Meeting 2016 - 20/4/2016

• iMarina

Towards Safer and Predictable Hardware Acceleration in Distributed, Embedded and High Performance Systems

Industriales Research Meeting 2016 - 20/4/2016

• iMarina

Automatic Integration of HLS-Generated Hardware Accelerators in an Embedded Parallel Computing Architecture

Industriales Research Meeting 2017 - 4/4/2017

• iMarina

Resilient communications for a multi-FPGA, hardware-accelerated cluster

Industriales Research Meeting 2017 - 4/4/2017

• iMarina

Reconfigurable video processor for space

Validation And Verification Of Automated Systems: Results Of The Enable-S3 Project (p. 231-249) - 1/1/2019

10.1007/978-3-030-14628-3_18 Ver en origen

• iMarina

Gurney Flaps and Trailing Edge Devices for Wind Turbines

European Wind Energy Conference And Exhibition 2006, Ewec 2006 (p. 175-176) - 27/2/2006

• iMarina

The influence of the state of the rilem plank when obtaining the fundamental frequency of vibration regarding the foundations of the new faculties at the Universidad de Sevilla (SPAIN)

19th International Congress On Sound And Vibration 2012, Icsv 2012 (p. 3237-3244) - 1/12/2012

• iMarina

A Dynamically Adaptable Image Processing Application Trading Off Between High Performance, Consumption and Dependability in Real Time

Design & Architectures For Signal & Image Processing (Dasip) (p. 1-4) - 8/10/2014

• iMarina

A dynamically adaptable bus architecture for trading-off among performance, consumption and dependability in Cyber-Physical Systems

Conference Digest - 24th International Conference On Field Programmable Logic And Applications, Fpl 2014 (p. 1-4) - 16/10/2014

10.1109/fpl.2014.6927394 Ver en origen

• iMarina
• iMarina

Dynamic management of multikernel multithread accelerators using Dynamic Partial Reconfiguration

International Symposium On Reconfigurable And Communication-Centric Systems-On-Chip (Recosoc) (p. 1-7) - 26/5/2014

10.1109/recosoc.2014.6861363 Ver en origen

• iMarina
• iMarina

Design of OpenCL-Compatible Multithreaded Hardware Accelerators with Dynamic Support for Embedded FPGAs

Proceedings Of International Symposium On Reconfigurable Communication-Centric Systems-On-Chip (Recosoc) (p. 1-8) - 29/6/2015

10.1109/reconfig.2015.7393297 Ver en origen

• iMarina
• iMarina

Live demonstration: A dynamically adaptable image processing application running in an FPGA-based WSN platform

Proceedings - Ieee International Symposium On Circuits And Systems (p. 1902-1902) - 27/7/2015

10.1109/iscas.2015.7169035 Ver en origen

• ISSN 02714310

• iMarina
• iMarina

Execution modeling in self-Aware FPGA-based architectures for efficient resource management

10th International Symposium On Reconfigurable And Communication-Centric Systems-On-Chip, Recosoc 2015 (p. 1-8) - 2/9/2015

10.1109/recosoc.2015.7238086 Ver en origen

• iMarina
• iMarina

Evaluating High-Level Synthesis Techniques for Scalable Hardware-Accelerated Computing

Proceedings Of Design Of Circuits And Integrated Systems (Dcis 2017) (p. 1-5) - 22/11/2017

• iMarina

Teaching hybrid HW/SW embedded system design using FPGA-based devices

2016 Conference On Design Of Circuits And Integrated Systems, Dcis 2016 - Proceedings (p. 161-166) - 6/2/2017

10.1109/dcis.2016.7845372 Ver en origen

• iMarina
• iMarina