Aranda Barjola, Luis Alberto luis.aranda@urjc.es
Publications
- Articles 17
- Books 0
- Book chapters 0
- Conferences 0
- Working papers 0
- Technical reports 0
- Research projects 0
- Supervised theses 0
- Patent or software license 0
Reliability Analysis of the SHyLoC CCSDS123 IP Core for Lossless Hyperspectral Image Compression Using COTS FPGAs
- Aranda, Luis Alberto
- Sanchez, Antonio
- Garcia-Herrero, Francisco
- Barrios, Yubal
- Sarmiento, Roberto
- Maestro, Juan Antonio;
Electronics - 1/10/2020
10.3390/electronics9101681 View at source
- ISSN 08834989
Toward a Fault-Tolerant Star Tracker for Small Satellite Applications
- Aranda, Luis Alberto
- Reviriego, Pedro
- Maestro, Juan Antonio;
Ieee Transactions On Aerospace And Electronic Systems (p. 3421-3431) - 1/10/2020
10.1109/taes.2020.2971289 View at source
- ISSN 00189251
An Algorithmic-Based Fault Detection Technique for the 1-D Discrete Cosine Transform
- Aranda, Luis Alberto
- Sanchez-Macian, Alfonso
- Maestro, Juan Antonio;
Ieee Transactions On Very Large Scale Integration (Vlsi) Systems (p. 1336-1340) - 1/5/2020
10.1109/tvlsi.2020.2969094 View at source
- ISSN 10638210
Efficient Majority-Logic Reed-Solomon Decoders for Single Symbol Correction
- Garcia-Herrero, Francisco
- Sanchez-Macian, Alfonso
- San-Isidro, Mateo
- Alberto Aranda, Luis
- Antonio Maestro, Juan;
Ieee Transactions On Device And Materials Reliability (p. 390-394) - 1/6/2020
10.1109/tdmr.2020.2980754 View at source
- ISSN 15304388
Reliability Analysis of ASIC Designs With Xilinx SRAM-Based FPGAs
- Aranda, Luis Alberto
- Ruano, Oscar
- Garcia-Herrero, Francisco
- Maestro, Juan Antonio;
Ieee Access (p. 140676-140685) - 1/1/2021
10.1109/access.2021.3119633 View at source
- ISSN 21693536
Fault Injection Emulation for Systems in FPGAs: Tools, Techniques and Methodology, a Tutorial
- Ruano, Oscar
- Garcia-Herrero, Francisco
- Aranda, Luis Alberto
- Sanchez-Macian, Alfonso
- Rodriguez, Laura
- Maestro, Juan Antonio;
Sensors - 1/2/2021
10.3390/s21041392 View at source
- ISSN 14248220
ACME-2: Improving the Extraction of Essential Bits in Xilinx SRAM-Based FPGAs
- Alberto Aranda, Luis
- Ruano, Oscar
- Garcia-Herrero, Francisco
- Antonio Maestro, Juan;
Ieee Transactions On Circuits And Systems Ii-Express Briefs (p. 1577-1581) - 1/1/2022
10.1109/tcsii.2021.3105558 View at source
- ISSN 15497747
This researcher has no books.
This researcher has no book chapters.
This researcher has no conferences.
This researcher has no working papers.
This researcher has no technical reports.
This researcher has no research projects.
This researcher has no supervised thesis.
This researcher has no patents or software licenses.
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