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Sautua Ruiz, Rafael rafael.sautua@upm.es

ARQUITECTURA Y TECNOLOGÍA DE SISTEMAS INFORMÁTICOS / Universidad Politécnica de Madrid

Publications

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Exploiting Bit-Level Design Techniques in Behavioural Synthesis

  • Hermida Correa 4
  • Mendías Cuadros 3
  • Molina Prego 1
  • Sautua Ruiz 2

High-Level Synthesis: From Algorithm To Digital Circuit (p. 257-284) - 1/1/2008

  • iMarina

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Arquitectura HW/SW para Sistemas de Alto Rendimiento

  • José Francisco Tirado Fernández (Investigador principal (IP))
  • SAUTUA RUIZ, RAFAEL (Investigador/a)

Period: 31-12-2005 - 30-12-2008

  • iMarina

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Last data update: 2/25/23 8:43 AM