Torre Arnanz, Eduardo De La eduardo.delatorre@upm.es
Publications
- Articles 36
- Books 1
- Book chapters 5
- Conferences 103
- Working papers 0
- Technical reports 0
- Research projects 35
- Supervised theses 11
- Patent or software license 0
A NEW APPROACH ON FAULT LIST HANDLING FOR FASTER FAULT ELIMINATION AND DIRECT TEST VECTOR GENERATION
- AGUADO, MJ
- CONESA, JL
- DELATORRE, E
- UCEDA, J;
Microprocessing And Microprogramming (p. 853-860) - 1/1/1991
10.1016/0165-6074(91)90449-4 View at source
- ISSN 01656074
Design methodologies based on hardware description languages
- Riesgo, T
- Torroja, Y
- de la Torre, E;
Ieee Transactions On Industrial Electronics (p. 3-12) - 1/12/1999
10.1109/41.744370 View at source
- ISSN 02780046
Hardware and software debugging of FPGA based microprocessor systems through debug logic insertion
- Valderas M
- de la Torre E
- Ariza F
- Riesgo T
Lecture Notes In Computer Science (p. 1057-1061) - 1/1/2004
- ISSN 03029743
- iMarina
ENAMORADO: Enabling Nomadic Agents in a Multimedia ORiented Architecture of Distributed Objects
- Krasteva, Yana E.
- Papagianni, Chrysa
- Kosmatos, Evangelos
- De La Torre, Eduardo
- Venieris, Iakovos S.
- Riesgo, Teresa;
Innovation And The Knowledge Economy: Issues, Applications, Case Studies, Pts 1 & 2 (p. 975-982) - 1/1/2005
- ISSN 15741230
- iMarina
A modular architecture for nodes in wireless sensor networks
- Portilla, J
- de Castro, A
- de la Torre, E
- Riesgo, T
Journal Of Universal Computer Science (p. 328-339) - 28/4/2006
10.3217/jucs-012-03-0328 View at source
- ISSN 0948695X
Adaptable Security in Wireless Sensor Networks by Using Reconfigurable ECC Hardware Coprocessors
- Portilla, J.
- Otero, A.
- de la Torre, E.
- Riesgo, T.
- Stecklina, O.
- Peter, S.
- Langendoerfer, P.;
International Journal Of Distributed Sensor Networks - 1/12/2010
10.1155/2010/740823 View at source
- ISSN 15501329
Reconfigurable Networks on Chip: DRNoC architecture
- Krasteva, Yana E.
- de la Torre, Eduardo
- Riesgo, Teresa;
Journal Of Systems Architecture (p. 293-302) - 1/7/2010
10.1016/j.sysarc.2010.04.003 View at source
- ISSN 13837621
Embedded Runtime Reconfigurable Nodes for Wireless Sensor Networks Applications
- Esteves Krasteva, Yana
- Portilla, Jorge
- de la Torre, Eduardo
- Riesgo, Teresa;
Ieee Sensors Journal (p. 1800-1810) - 5/8/2011
10.1109/jsen.2011.2104948 View at source
- ISSN 1530437X
Using SRAM based FPGAs for power-aware high performance wireless sensor networks
- Valverde, Juan
- Otero, Andres
- Lopez, Miguel
- Portilla, Jorge
- de la Torre, Eduardo
- Riesgo, Teresa
Sensors (p. 2667-2692) - 1/3/2012
10.3390/s120302667 View at source
- ISSN 14248220
Self-Reconfigurable Evolvable Hardware System for Adaptive Image Processing
- Salvador, Ruben
- Otero, Andres
- Mora, Javier
- de la Torre, Eduardo
- Riesgo, Teresa
- Sekanina, Lukas;
Ieee Transactions On Computers (p. 1481-1493) - 22/7/2013
10.1109/tc.2013.78 View at source
- ISSN 00189340
Dynamic reconfigurable NoC (DRNoC) architecture: Application to fast NoC emulation
- Krasteva Y
- de la Torre E
- Riesgo T
Dynamic Reconfigurable Network-On-Chip Design: Innovations For Computational Processing And Communication (p. 220-254) - 1/12/2010
Run-time scalable architecture for deblocking filtering in H.264/AVC and SVC video codecs
- Teresa Cervero
- S. López
- G. Gallicó
- OTERO MARNOTES, JOSE ANDRES
- RIESGO ALCAIDE, TERESA
- TORRE ARNANZ, EDUARDO DE LA
Embedded Systems Design With Fpgas (p. 173-199) - 1/11/2013
Wireless Sensor Networks: From Real World to System Integration - Alternative Hardware Approaches
Comprehensive Materials Processing (p. 353-373) - 1/1/2014
FPGAs and reconfigurable systems
- Rodriguez-Andina JJ
- de la Torre E
Fundamentals Of Industrial Electronics (p. 24-1-24-18) - 19/4/2016
- iMarina
A Novel FPGA-based Evolvable Hardware System based on Multiple Processing Arrays
- Gallego A
- Mora J
- Otero A
- Salvador R
- De La Torre E
- Riesgo T
Proceedings - Ieee 27th International Parallel And Distributed Processing Symposium Workshops And Phd Forum, Ipdpsw 2013 (p. 182-191) - 20/5/2013
10.1109/ipdpsw.2013.56 View at source
- iMarina
- iMarina
Hardening Digital Systems with Distributed Functionality: Robust Networks
- Marta Portela
- Celia López
- A. Vaskova
- RIESGO ALCAIDE, TERESA
- TORRE ARNANZ, EDUARDO DE LA
- PORTILLA BERRUECO, JORGE
Proceedings Of Spie - The International Society For Optical Engineering (p. 0-5) - 12/8/2013
10.1117/12.2017474 View at source
- ISSN 0277786X
- iMarina
- iMarina
Architectural Evaluation of Dynamic and Partial Reconfigurable Systems designed with DREAMS Tool
- OTERO MARNOTES, JOSE ANDRES
- RIESGO ALCAIDE, TERESA
- TORRE ARNANZ, EDUARDO DE LA
Proceedings Of Spie - The International Society For Optical Engineering (p. 0-5) - 12/8/2013
10.1117/12.2021271 View at source
- ISSN 0277786X
- iMarina
- iMarina
A self-adaptive image processing application based on evolvable and scalable hardware
- Gallego, Angel
- Mora, Javier
- Otero, Andres
- Lopez, Blanca
- de la Torre, Eduardo
- Riesgo, Teresa
Proceedings Of International Conference On Field Programmable Logic And Applications (Fpl) (p. 0-5) - 2/9/2013
10.1109/fpl.2013.6645631 View at source
- iMarina
- iMarina
A Dynamically Adaptable Image Processing Application Trading Off Between High Performance, Consumption and Dependability in Real Time
- RIESGO ALCAIDE, TERESA
- TORRE ARNANZ, EDUARDO DE LA
- Rodriguez Medina, Alfonso
- PORTILLA BERRUECO, JORGE
- MORA DE SAMBRICIO, JAVIER
Design & Architectures For Signal & Image Processing (Dasip) (p. 1-4) - 8/10/2014
- iMarina
Development of Brain-Computer Interfaces using evolvable hardware
- RIESGO ALCAIDE, TERESA
- TORRE ARNANZ, EDUARDO DE LA
- MORA DE SAMBRICIO, JAVIER
Design & Architectures For Signal & Image Processing (Dasip) (p. 1-4) - 8/10/2014
- iMarina
Increased fault tolerance in evolvable hardware through automatic upscaling
- OTERO MARNOTES, JOSE ANDRES
- RIESGO ALCAIDE, TERESA
- TORRE ARNANZ, EDUARDO DE LA
- MORA DE SAMBRICIO, JAVIER
Design & Architectures For Signal & Image Processing (Dasip) (p. 1-4) - 8/10/2014
- iMarina
A dynamically adaptable bus architecture for trading-off among performance, consumption and dependability in Cyber-Physical Systems
Conference Digest - 24th International Conference On Field Programmable Logic And Applications, Fpl 2014 (p. 1-4) - 16/10/2014
10.1109/fpl.2014.6927394 View at source
- iMarina
- iMarina
Collaborative Evolution Strategies on Evolvable Hardware Networked Elements
- Vazquez J
- Lopez B
- Valverde J
- De La Torre E
- Riesgo T
Conference On Design Of Circuits And Integrated Systems (Dcis) (p. 1-4) - 26/11/2014
10.1109/dcis.2014.7035554 View at source
- iMarina
- iMarina
A Progressive Dual-Rail Routing Repair Approach for FPGA Implementation of Crypto Algorithm
- Tu C
- He W
- Gao N
- De La Torre E
- Liu Z
- Liu L
Proceeding On Ispec 2014 (p. 0-0) - 5/5/2014
10.1007/978-3-319-06320-1_17 View at source
- ISSN 03029743
- iMarina
- iMarina
This researcher has no working papers.
This researcher has no technical reports.
Reconfigurabilidad Dinámica para Escalabilidad en Redes Orientadas a Aplicaciones Multimedia
- PORTILLA BERRUECO, JORGE (Participante)
- SALVADOR PEREA, RUBEN (Participante)
- OTERO MARNOTES, JOSE ANDRES (Participante)
- MORENO GONZALEZ, FELIX ANTONIO (Participante)
- TORROJA FUNGAIRIÑO, YAGO (Participante)
- TORRE ARNANZ, EDUARDO DE LA (Participante)
- RIESGO ALCAIDE, TERESA (Investigador principal (IP))
Period: 01-01-2009 - 31-12-2011
Type of funding: National
- iMarina
TECNOCAI. Tecnologías eficientes e inteligentes orientadas a la salud y al confort en ambientes interiores.
- Rodriguez Medina, Alfonso (Participante)
- ZAMACOLA ALCALDE, RAFAEL MARIA (Participante)
- ZATO RECELLADO, José Gabriel (Investigador principal (IP))
- RIESGO ALCAIDE, TERESA (Investigador principal (IP))
- CECILIA FERNÁNDEZ-CONDE, LOURDES (Participante)
- PORTILLA BERRUECO, JORGE (Participante)
- MORENO GONZALEZ, FELIX ANTONIO (Participante)
- TORRE ARNANZ, EDUARDO DE LA (Participante)
- NARANJO HERNANDEZ, JOSE EUGENIO (Participante)
Period: 01-12-2009 - 01-12-2012
Type of funding: National
Amount of funding: 26100,00 Euros.
- iMarina
Reconfigurable ultra-autonomous novel robots: RUNNER
- Rodriguez Medina, Alfonso (Participante)
- PORTILLA BERRUECO, JORGE (Participante)
- RIESGO ALCAIDE, TERESA (Participante)
- TORRE ARNANZ, EDUARDO DE LA (Investigador principal (IP))
Period: 01-12-2010 - 31-12-2013
Type of funding: National
Amount of funding: 55500,00 Euros.
- iMarina
Reconfigurable Ultra-Autonomous Novel Robots
- TORRE ARNANZ, EDUARDO DE LA (Investigador principal (IP))
Period: 01-12-2010 - 31-12-2013
Type of funding: International
- iMarina
WSN Development, Planning and Commissioning & Maintenance ToolSet
- TORRE ARNANZ, EDUARDO DE LA (Participante)
- MORENO GONZALEZ, FELIX ANTONIO (Participante)
- PORTILLA BERRUECO, JORGE (Participante)
- RIESGO ALCAIDE, TERESA (Investigador principal (IP))
Period: 01-01-2011 - 31-12-2014
Type of funding: National
Amount of funding: 242569,60 Euros.
- iMarina
ENCE-NG: Enclavamiento Electrónico de Nueva Generación
- ZAMACOLA ALCALDE, RAFAEL MARIA (Participante)
- VILLAVERDE SAN JOSE, MONICA (Participante)
- ALEDO ORTEGA, DAVID (Participante)
- Rodriguez Medina, Alfonso (Participante)
- MORENO GONZALEZ, FELIX ANTONIO (Investigador principal (IP))
- RIESGO ALCAIDE, TERESA (Participante)
- TORRE ARNANZ, EDUARDO DE LA (Participante)
- GARCIA SUAREZ, OSCAR (Participante)
- PORTILLA BERRUECO, JORGE (Participante)
Period: 17-10-2011 - 16-04-2013
Type of funding: National
- iMarina
Open Source FPGA Accelerator & Hardware-Software Codesign Toolset for CUDA Kernels
- RIESGO ALCAIDE, TERESA (Investigador principal (IP))
- TORRE ARNANZ, EDUARDO DE LA (Participante)
- PORTILLA BERRUECO, JORGE (Participante)
- TORROJA FUNGAIRIÑO, YAGO (Participante)
- OTERO MARNOTES, JOSE ANDRES (Participante)
- SALVADOR PEREA, RUBEN (Participante)
- MORENO GONZALEZ, FELIX ANTONIO (Participante)
Period: 01-11-2011 - 31-10-2013
Type of funding: International
Amount of funding: 302068,00 Euros.
- iMarina
Sistema de iluminación inteligente.
- VILLAVERDE SAN JOSE, MONICA (Miembro del equipo de trabajo)
- NOGAR CANTERO, NOEMÍ (Miembro del equipo de trabajo)
- RIESGO ALCAIDE, TERESA (Participante)
- PORTILLA BERRUECO, JORGE (Participante)
- TORRE ARNANZ, EDUARDO DE LA (Participante)
- MORENO GONZALEZ, FELIX ANTONIO (Investigador principal (IP))
Period: 04-05-2011 - 05-01-2013
Type of funding: National
Amount of funding: 196859,00 Euros.
- iMarina
ICT Tools greening food processing businesses
- RIESGO ALCAIDE, TERESA (Investigador principal (IP))
- PORTILLA BERRUECO, JORGE (Participante)
- TORRE ARNANZ, EDUARDO DE LA (Participante)
- TORROJA FUNGAIRIÑO, YAGO (Participante)
- MORENO GONZALEZ, FELIX ANTONIO (Participante)
- MAIGLER LÓPEZ, Mª VICTORIA (Participante)
- ALEDO ORTEGA, DAVID (Participante)
- ALONSO FERNÁNDEZ, JESÚS (Participante)
- ARCAS CASTRO, GUILLERMO DE (Participante)
- MUJICA ROJAS, GABRIEL NOE (Participante)
Period: 12-09-2011 - 11-09-2014
Type of funding: International
Amount of funding: 109170,00 Euros.
- iMarina
Dynamically Reconfigurable embedded platforms for Networked Context-aware multimedia Systems-UPM
- RIESGO ALCAIDE, TERESA (Investigador principal (IP))
- TORROJA FUNGAIRIÑO, YAGO (Participante)
- OTERO MARNOTES, JOSE ANDRES (Participante)
- PORTILLA BERRUECO, JORGE (Participante)
- MORENO GONZALEZ, FELIX ANTONIO (Participante)
- TORRE ARNANZ, EDUARDO DE LA (Participante)
- ABAD ARROYO, RICARDO (Participante)
- MUJICA ROJAS, GABRIEL NOE (Participante)
Period: 01-01-2012 - 30-06-2015
Type of funding: National
Amount of funding: 88088,00 Euros.
- iMarina
Emulación en prototipos basados en fpgas: métodos de depuración mediante inserción de lógica compatible con el estándar ieee-1149.1
- TORRE ARNANZ, EDUARDO DE LA (Director) Doctorando: GARCIA VALDERAS, Mario
1/1/2004
- iMarina
Reconfigurable Computing Based on Commercial FPGAs. Solutions for the Design and Implementation of Partially Reconfigurable Systems = Computación reconfigurable basada en FPGAs comerciales. Soluciones para el diseño e implementación de sistemas parcialmente reconfigurables.
- TORRE ARNANZ, EDUARDO DE LA (Director) Doctorando: Esteves Krasteva, Yana
1/1/2009
- iMarina
Run-Time Scalable Hardware for Reconfigurable Systems
- TORRE ARNANZ, EDUARDO DE LA (Director) Doctorando: Otero Marnotes, Andres
1/1/2014
- iMarina
Side-Channel Attack Protection Techniques in FPGA Systems using Enhanced Dual-Rail Solutions
- TORRE ARNANZ, EDUARDO DE LA (Director) Doctorando: He, Wei
1/1/2014
- iMarina
Run-Time Dynamically-Adaptable FPGA-Based Architecture for High-Performance Autonomous Distributed Systems
- PORTILLA BERRUECO, JORGE (Director)
- TORRE ARNANZ, EDUARDO DE LA (Director) Doctorando: Valverde Alcalá, Juan
1/1/2015
- iMarina
Parametric and structural self-adaptation of embedded systems using evolvable hardware
- SEKANINA, Lukáš (Director)
- TORRE ARNANZ, EDUARDO DE LA (Director) Doctorando: Salvador Perea, Rubén
1/1/2015
- iMarina
Architecture and methodology for automated development of evolvable and reconfigurable hardware applications
- TORRE ARNANZ, EDUARDO DE LA (Director) Doctorando: Mora de Sambricio, Javier
1/1/2019
- iMarina
A Framework to Support Run-Time Adaptation in Reconfigurable Multi-Accelerator Systems
- TORRE ARNANZ, EDUARDO DE LA (Director) Doctorando: Rodríguez Medina, Alfonso
10/10/2020
- iMarina
Runtime Adaptive Hardware/Software Execution in Complex Heterogeneous Systems
- TORRE ARNANZ, EDUARDO DE LA (Director) Doctorando: Suriano, Leonardo
31/1/2021
- iMarina
Design Methodologies and Architectures for Just-in-Time Hardware Composition of Multi Grain Reconfigurable Accelerators
- Otero Marnotes, Andrés (Director)
- TORRE ARNANZ, EDUARDO DE LA (Director)
- OTERO MARNOTES, JOSE ANDRES (Codirector) Doctorando: Zamacola Alcalde, Rafael María
4/7/2022
- iMarina
This researcher has no patents or software licenses.
Research groups
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Grupo en Tecnología Electrónica Aplicada (GTEA)
Role: Investigador Principal
Researcher profiles
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ORCID
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Publons
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Scopus Author ID