The data shown for the Universidad Carlos III de Madrid are partial, as they are intended to answer 2 questions:
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The search results will adhere to the following limits: active Researchers at Carlos III University of Madrid, Projects since 2006 and Publications, Theses, Patents and Software since 2008.
Entrena Arrontes, Luis Alfonso entrena@ing.uc3m.es
Publications
- Articles 42
- Books 0
- Book chapters 2
- Conferences 40
- Working papers 0
- Technical reports 0
- Research projects 44
- Supervised theses 4
- Patent or software license 1
Analyzing the Impact of Single-Event-Induced Charge Sharing in Complex Circuits
- Pagliarini, Samuel N.
- Kastensmidt, Fernanda
- Entrena Arrontes, Luis Alfonso
- Lindoso Muñoz, Almudena
- San Millan Heredia, Enrique
IEEE TRANSACTIONS ON NUCLEAR SCIENCE (p. 2768-2775) - 12/2011
https://doi.org/10.1109/tns.2011.2168239 View at source
- EISSN 1558-1578
- ISSN 0018-9499
Comparison of parallel implementation strategies in GPU-accelerated System-on-Chip under proton irradiation
- Badia, Jose M.
- Leon, German
- Belloch Rodriguez, Jose Antonio
- Garcia Valderas, Mario
- Lindoso Muñoz, Almudena
- Entrena Arrontes, Luis Alfonso
IEEE TRANSACTIONS ON NUCLEAR SCIENCE (p. 444-452) - 3/2022
10.1109/tns.2021.3128722 View at source
- EISSN 1558-1578
- ISSN 0018-9499
Constrained Placement Methodology for Reducing SER Under Single-Event-Induced Charge Sharing Effects
- Entrena Arrontes, Luis Alfonso
- Lindoso Muñoz, Almudena
- San Millan Heredia, Enrique
- Pagliarini, Samuel N.
- Almeida, Felipe
- Kastensmidt, Fernanda
IEEE TRANSACTIONS ON NUCLEAR SCIENCE (p. 811-817) - 8/2012
https://doi.org/10.1109/tns.2012.2191796 View at source
- EISSN 1558-1578
- ISSN 0018-9499
Dual-Core Lockstep enhanced with redundant multithread support and control-flow error detection
- Peña Fernandez, Manuel
- Serrano-cases, A.
- Lindoso Muñoz, Almudena
- Garcia Valderas, Mario
- Entrena Arrontes, Luis Alfonso
- Martinez-alvarez, A.
- Cuenca-asensi, S.
MICROELECTRONICS RELIABILITY (p. 113447) - 9/2019
https://doi.org/10.1016/j.microrel.2019.113447 View at source
- ISSN 0026-2714
Dynamic control of entropy and power consumption in TRNGs for IoT applications
- Martin Gonzalez, Honorio
- San Millan Heredia, Enrique
- Entrena Arrontes, Luis Alfonso
IEICE Electronics Express (p. 1-11) - 1/2018
https://doi.org/10.1587/elex.14.20171157 View at source
- EISSN 1349-9467
- ISSN 1349-2543
Efficient mitigation of data and control-flow errors in microprocessors
- Parra Avellaneda, Luis Isaias
- Lindoso Muñoz, Almudena
- Portela Garcia, Marta
- Entrena Arrontes, Luis Alfonso
- Restrepo Calle, Felipe
- Cuenca Asensi, Sergio
- Martinez Alvarez, Antonio
IEEE TRANSACTIONS ON NUCLEAR SCIENCE (p. 1590-1596) - 8/2014
https://doi.org/10.1109/tns.2014.2310492 View at source
- EISSN 1558-1578
- ISSN 0018-9499
Error Detection and Mitigation of Data-Intensive Microprocessor Applications Using SIMD and Trace Monitoring
- Peña Fernandez, Manuel
- Lindoso Muñoz, Almudena
- Entrena Arrontes, Luis Alfonso
- Garcia Valderas, Mario
IEEE TRANSACTIONS ON NUCLEAR SCIENCE (p. 1452-1460) - 7/2020
https://doi.org/10.1109/tns.2020.2992299 View at source
- EISSN 1558-1578
- ISSN 0018-9499
Error Mitigation Using Approximate Logic Circuits: A Comparison of Probabilistic and Evolutionary Approaches
- Sanchez Clemente, Antonio Jose
- Entrena Arrontes, Luis Alfonso
- Hrbacek, Radek
- Sekanina, Lukas
IEEE TRANSACTIONS ON RELIABILITY (p. 1871-1883) - 12/2016
https://doi.org/10.1109/tr.2016.2604918 View at source
- EISSN 1558-1721
- ISSN 0018-9529
Error sensitivity study of FFT architectures implemented in FPGA
- Garcia Astudillo, Luis Angel
- Lindoso Muñoz, Almudena
- Entrena Arrontes, Luis Alfonso
- Martin Gonzalez, Honorio
- Garcia Valderas, Mario
MICROELECTRONICS RELIABILITY (p. 1-5) - 11/2021
https://doi.org/10.1016/j.microrel.2021.114298 View at source
- ISSN 0026-2714
Evaluating the Effectiveness of a Software-Based Technique Under SEEs Using FPGA-Based Fault Injection Approach
- Portela Garcia, Marta
- Lindoso Muñoz, Almudena
- Entrena Arrontes, Luis Alfonso
- Garcia Valderas, Mario
- Lopez Ongil, Celia
- Marroni, N.
- Pianta, B.
- Poehls, L. Bolzani
- Vargas, F.
JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS (p. 777-789) - 12/2012
https://doi.org/10.1007/s10836-012-5321-4 View at source
- EISSN 1573-0727
- ISSN 0923-8174
This researcher has no books.
Fault-tolerance techniques for soft-core processors using the trace interface. In: FPGAs and parallel architectures for aerospace applications
- Entrena Arrontes, Luis Alfonso
- Lindoso Muñoz, Almudena
- Portela Garcia, Marta
- Parra Avellaneda, Luis Isaias
- Du, Boyang
- Sonza Reorda, Matteo
- Sterpone, Luca
FPGAs and parallel architectures for aerospace applications (p. 293-293-306) - 1/2016
Editor: SPRINGER
https://doi.org/10.1007/978-3-319-14352-1_19 View at source
- ISBN 978-3-319-14351-4
Hardware Fault Injection. In: Soft Errors in Modern Electronic Systems
- Entrena Arrontes, Luis Alfonso
- Lopez Ongil, Celia
- Garcia Valderas, Mario
- Portela Garcia, Marta
- Nicolaidis, Michael
Soft Errors in Modern Electronic Systems (p. 141-166) - 11/2010
Editor: SPRINGER
https://doi.org/10.1007/978-1-4419-6993-4_6 View at source
- ISBN 978-1-4419-6992-7
A New Hybrid Non-Intrusive Error-Detection Technique Using Dual Control-Flow Monitoring
- Parra Avellaneda, Luis Isaias
- Lindoso Muñoz, Almudena
- Portela Garcia, Marta
- Entrena Arrontes, Luis Alfonso
- Sonza Reorda, Matteo
- Du, Boyang
- Sterpone, Luca
51st annual IEEE Nuclear and Space Radiation Effects Conference (NSREC 2014) - 2014
A Recovery Mechanism for SET Protection Using Standard-Cells
- Arevalo Garbayo, Jose Maximino
- Garcia Valderas, Mario
- Lopez Ongil, Celia
- Entrena Arrontes, Luis Alfonso
- Portela Garcia, Marta
2011 12th European Conference on Radiation and Its Effects on Components and Systems (RADECS) (p. 128-131) - 2011
Editor: IEEE - THE INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, INC
- ISBN 978-1-4577-0585-4
A method to assess the robustness of cryptographic circuits at the design stage
- Arevalo Garbayo, Jose Maximino
- Portela Garcia, Marta
- Garcia Valderas, Mario
- Lopez Ongil, Celia
- Entrena Arrontes, Luis Alfonso
27th Conference on Design of Circuits and Integrated Systems (DCIS 2012) (p. 1354-1360) - 2014
Editor: ELSEVIER B.V.
A new solution to on-line detection of Control Flow Errors
- Du, B.
- Sonza Reorda, Matteo
- Sterpone, Luca
- Parra Avellaneda, Luis Isaias
- Portela Garcia, Marta
- Lindoso Muñoz, Almudena
- Entrena Arrontes, Luis Alfonso
20th IEEE International On-Line Testing Symposium (IOLTS 2014) (p. 105-110) - 2014
https://doi.org/10.1109/iolts.2014.6873680 View at source
- ISBN 978-1-4799-5324-0
ATOM: A Pseudorandom Number Generator Suitable for RFID Protocols
- Martin Gonzalez, Honorio
- Peris Lopez, Pedro
- San Millan Heredia, Enrique
- Entrena Arrontes, Luis Alfonso
XXVI Design of Circuits and Integrated Systems (DCIS 2011) - 2011
Akari-X: A Pseudorandom Number Generator for Secure Lightweight Systems
- Martin Gonzalez, Honorio
- San Millan Heredia, Enrique
- Entrena Arrontes, Luis Alfonso
- Peris Lopez, Pedro
- Hernandez Castro, Julio Cesar
17th International On-Line Testing Symposium (IOLTS 2011) (p. 228-233) - 2011
Editor: IEEE - THE INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, INC
- ISBN 978-1-4577-1053-7
Analysis of Turbo Decoder Robustness Against SEU Effects
- Berrojo, L.
- Lopez Ongil, Celia
- Garcia Valderas, Mario
- Lestriez, B.
- Portela Garcia, Marta
- Entrena Arrontes, Luis Alfonso
8th European Workshop on Radiation Effects on Components and Systems (RADECS 2008) - 2008
Approximate TMR for selective error mitigation in FPGAs based on testability analysis
- Sanchez, Antonio
- Entrena Arrontes, Luis Alfonso
- Kastensmidt, Fernanda
2018 NASA/ESA Conference on Adaptive Hardware and Systems (2018 AHS) (p. 112-119) - 2018
Editor: IEEE Computer Society.
https://doi.org/10.1109/ahs.2018.8541485 View at source
- ISBN 978-1-5386-7753-7
Approximate logic functions for SET mitigation in sequential circuits
- Sanchez Clemente, Antonio Jose
- Entrena Arrontes, Luis Alfonso
- Garcia Valderas, Mario
- Lopez Ongil, Celia
XXVII International Conference on Design of Circuits and Integrated Circuits (DCIS 2012) (p. 195-200) - 2012
- ISBN 978295174614
Assesing SET Sensitivity of PLL
- Portela Garcia, Marta
- Lopez Ongil, Celia
- Garcia Valderas, Mario
- Entrena Arrontes, Luis Alfonso
- Thys, Geert
- Redant, Steven
Conference on Design of Circuits and Integrated Systems (DCIS) (p. 1-6) - 2014
Editor: IEEE INSTITUTE OF ELECTRICAL
- ISBN 978-1-4799-5743-9
This researcher has no working papers.
This researcher has no technical reports.
TSI-020400-2009-17 - APOLO-PARTICIPACION ESPAÑOLA EN EL PROYECTO OPTIMISE (ANUALIDAD 2009).
- Entrena Arrontes, Luis Alfonso
- Lopez Ongil, Celia
- Garcia Valderas, Mario
- Portela Garcia, Marta
Period: 18-02-2009 - 31-03-2010
Type of funding: European
Funding entity: MINISTERIO DE ENERGIA, TURISMO Y AGENDA DIGITAL
Adaptación de módulo criptográfico.
- Entrena Arrontes, Luis Alfonso
- Lopez Ongil, Celia
- San Millan Heredia, Enrique
- Garcia Valderas, Mario
- Portela Garcia, Marta
- Lindoso Muñoz, Almudena
Period: 01-06-2009 - 31-12-2009
Type of funding: National
Funding entity: CNI (CENTRO NACIONAL DE INTELIGENCIA)- Mº DEFENSA
Ampliación de Actividades en el Campo Específico de las Tecnologías de Sensores Ópticos Touchless para Aplicaciones Biométricas
- Entrena Arrontes, Luis Alfonso
- Lopez Ongil, Celia
- San Millan Heredia, Enrique
- Sanchez Reillo, Raul
- Lindoso Muñoz, Almudena
Period: 19-07-2006 - 19-04-2007
Type of funding: International
Funding entity: TBS NORTH AMERICA INC.
Expte. 301026023900 - Ampliación del Sistema Acelerador Hardware de Tareas Criptográficas
- Entrena Arrontes, Luis Alfonso
- Lopez Ongil, Celia
- Garcia Lorenz, Michael Victorio
- Garcia Valderas, Mario
Period: 16-06-2006 - 20-03-2007
Type of funding: National
Funding entity: CENTRO NACIONAL DE INTELIGENCIA
TEC2010-22095-C03-03 - Análisis integral de circuitos y sistemas digitales para aplicaciones aeroespaciales, subproyecto "Diseño y verificación de sistemas digitales robustos"
- Lopez Ongil, Celia
- San Millan Heredia, Enrique
- Entrena Arrontes, Luis Alfonso
- Garcia Valderas, Mario
- Portela Garcia, Marta
- Lindoso Muñoz, Almudena
- Arevalo Garbayo, Jose Maximino
- Vaskova, Anna
- Martin Gonzalez, Honorio
- Velazco, Raoul
- Parra Avellaneda, Luis Isaias
- Sanchez Clemente, Antonio Jose
Period: 01-01-2011 - 30-09-2014
Type of funding: National
Funding entity: MINISTERIO DE CIENCIA E INNOVACION
Expte.: 2006/1497 - Aplicación para Test de CPLD Coolrunner-II
- Lopez Ongil, Celia
- Entrena Arrontes, Luis Alfonso
- Garcia Valderas, Mario
- Portela Garcia, Marta
Period: 18-06-2006 - 18-12-2006
Type of funding: National
Funding entity: INSTITUTO NACIONAL DE TECNICA AEROESPACIAL (INTA)
TSI-020400-2010-53 - Apolo-participación española en el proyecto optimise
- Entrena Arrontes, Luis Alfonso
- Lopez Ongil, Celia
- San Millan Heredia, Enrique
- Garcia Valderas, Mario
- Portela Garcia, Marta
- Lindoso Muñoz, Almudena
- Zharikov Sanchez, Yuri
Period: 06-05-2010 - 31-12-2012
Type of funding: European
Funding entity: MINISTERIO INDUSTRIA, TURISMO Y COMERCIO
Subcontratación PROFIT 2006 - BIOMATCH. Lector de Tarjetas Inteligentes con Securización Biométrica
- Entrena Arrontes, Luis Alfonso
- San Millan Heredia, Enrique
- Sanchez Reillo, Raul
- Lindoso Muñoz, Almudena
Period: 01-03-2006 - 31-12-2006
Funding entity: C3PO, S.A.
Beam Hopping Enabled Digital ASIC
- Garcia Valderas, Mario
- Entrena Arrontes, Luis Alfonso
- Portela Garcia, Marta
Period: 01-11-2015 - 01-09-2016
Type of funding: Regional
Funding entity: ARQUIMEA INGENIERIA, S.L.U.
FIT-330100-2006-92 - CIRCE, Contribución española al proyecto PARACHUTE (MEDEA+ 2A701)
- Entrena Arrontes, Luis Alfonso
- Lopez Ongil, Celia
- Garcia Valderas, Mario
- Portela Garcia, Marta
Period: 01-01-2006 - 31-03-2008
Type of funding: European
Funding entity: MINISTERIO INDUSTRIA, TURISMO Y COMERCIO DIR. GRAL. DESARROLLO SOC. INFORMACION
Transient<br/> error mitigation by means of approximate logic circuits
- Entrena Arrontes, Luis Alfonso
- Sanchez Clemente, Antonio Jose
Reading date: 03-11-2017
Técnicas<br/> Híbridas de Tolerancia a Fallos en Microprocesadores
- Entrena Arrontes, Luis Alfonso
- Parra Avellaneda, Luis Isaias
- Lindoso Muñoz, Almudena
Reading date: 15-11-2017
Contribución al reconocimiento de huellas dactilares mediante técnicas de correlación y arquitecturas hardware para el aumento de prestaciones
- Entrena Arrontes, Luis Alfonso
- Lindoso Muñoz, Almudena
Reading date: 08-05-2009
Dispositivo y procedimiento para la identificación unívoca de un circuito integrado
- Entrena Arrontes, Luis Alfonso
- Martin Gonzalez, Honorio
- San Millan Heredia, Enrique
3/5/2019
Date filed: 31-03-2017
Date issued: 03-05-2019
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